Design and Implementation of a Low-Complexity Multi-h CPM Receiver with Linear Phase Approximation Synchronization...

Area of Science:

• Digital Communications
• Signal Processing
• Wireless Communication Systems

Background:

• Multi-h continuous phase modulation (CPM) offers high spectral efficiency but suffers from complex demodulation.
• Traditional synchronization methods for multi-h CPM require numerous matched filters and complex trellis structures.
• High demodulation complexity hinders the practical implementation of advanced modulation schemes.

Purpose of the Study:

• To propose an efficient all-digital demodulator for multi-h CPM.
• To reduce the complexity of synchronization algorithms in multi-h CPM receivers.
• To decrease the hardware resource overhead for implementing multi-h CPM demodulators.

Main Methods:

• Developed a low-complexity decision-directed synchronization algorithm.
• Proposed a reduced-complexity timing error detector using linear phase approximation (LPA).
• Implemented the LPA-based synchronization receiver on a Xilinx Kintex-7 FPGA platform.

Main Results:

• The LPA-based synchronization algorithm avoids derivative matched filtering, reducing matched filters by approximately 2/3.
• Numerical simulations show no loss in estimated accuracy and bit error rate (BER) performance compared to traditional methods.
• FPGA implementation demonstrates ignorable BER loss and significant reduction in hardware resources (27% slices, 64% DSPs, 70% BRAMs).

Conclusions:

• The proposed LPA-based synchronization algorithm offers an efficient and practical solution for multi-h CPM demodulation.
• The reduced complexity and hardware overhead make it suitable for resource-constrained digital communication systems.
• The all-digital demodulator achieves performance comparable to simulations with substantial implementation savings.