Related Experiment Video
Updated: Jul 8, 2025

Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
Published on: April 12, 2018
Subthreshold Current Suppression in ReS2 Nanosheet-Based Field-Effect Transistors at High Temperatures
Ofelia Durante1, Kimberly Intonti1, Loredana Viscardi1
1Department of Physics "E. R. Caianiello", University of Salerno, via Giovanni Paolo II 132, Fisciano, 84084 Salerno, Italy.
Researchers investigated hysteresis in rhenium disulfide (ReS2) field-effect transistors (FETs). They found that suppressing subthreshold current at higher temperatures in ReS2 FETs inverts hysteresis, improving performance.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Two-dimensional rhenium disulfide (ReS2) is a transition-metal dichalcogenide with promising applications in electronics.
- Field-effect transistors (FETs) based on ReS2 are being explored for devices like photodetectors and memory.
Purpose of the Study:
- Investigate the suppression of subthreshold current in ReS2 FETs.
- Analyze the resulting inversion of hysteresis in transfer characteristics.
- Determine the influence of temperature, sweeping gate voltage, and pressure on this phenomenon.
Main Methods:
- Fabrication and characterization of ReS2 nanosheet-based FETs.
- Electrical measurements of transfer characteristics under varying conditions (temperature, gate sweep, pressure).
- Analysis of gate current behavior in conjunction with drain current suppression.
Main Results:
- Forward voltage gate sweep suppresses subthreshold current in ReS2 FETs.
- This suppression leads to an anticlockwise hysteresis, inverting the typical clockwise behavior.
- Current suppression correlates with a gate current peak, dependent on temperature but not pressure.
- Thermal-assisted tunneling through gate oxide traps is identified as the mechanism.
Conclusions:
- The charge/discharge of gate oxide traps via thermal-assisted tunneling explains the observed current suppression and hysteresis inversion.
- High-temperature operation of ReS2 FETs can reduce power consumption.
- This study extends the potential operational temperature range for ReS2 nanosheet-based FETs.
More Related Videos
09:20Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
Published on: December 7, 2015
08:12Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures
Published on: December 5, 2015
Related Concept Videos
MOSFET: Depletion Mode
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...
Metal-Semiconductor Junctions
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The...
Field Effect Transistor
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
MOSFET
In an n-MOSFET, the structure includes n-type source and drain...
Schottky Barrier Diode