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Analysis of Lanthanum Oxide Based Double-Gate SOI MOSFET using Monte-Carlo Process
Pattunnarajam Paramasivam1, Naveenbalaji Gowthaman2, Viranjay M Srivastava2,3
1Department of Electronics and Communication Engineering, Prince Shri Venkateshwara Padmavathy Engineering College, Chennai, 600127, India.
This study introduces a novel Double-Gate (DG) Silicon On-Insulator (SOI) MOSFET using a single material and Lanthanum Oxide dielectric. Monte Carlo simulations reveal its potential for advanced nanoscale device applications and scalability.
Area of Science:
- Semiconductor Physics
- Materials Science
- Nanotechnology
Background:
- Focuses on Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) using Silicon On-Insulator (SOI) technology.
- Highlights the use of Lanthanum Oxide (La2O3) as a high-k dielectric interface material between gates and the silicon channel.
- Addresses the need for advanced materials in nanoscale devices to overcome scalability challenges.
Purpose of the Study:
- To propose and analyze a novel DG SOI MOSFET design incorporating a single material and La2O3 dielectric.
- To investigate the electrical properties and performance of this proposed device structure.
- To evaluate its suitability for future nanoscale electronic applications.
Main Methods:
- Utilizes Monte Carlo (MC) simulation to analyze the device physics and electrical characteristics.
- Examines Conduction Band Energy (Ec) profiles, electron sheet carrier densities (ns), electric fields, and potential distribution.
- Simulates particle movement and average velocity within the nanoscale channel.
Main Results:
- Achieved a peak electric field (E) of 6x10^5 V/cm and an average drift velocity (υavg) of 1.6x10^7 cm/s.
- Observed a Conduction Band Energy drop of -0.04 eV from the source to the drain side (4% of the operating region).
- Demonstrated the effectiveness of MC simulation for high-energy transport and nanoscale modeling.
Conclusions:
- The proposed DG SOI MOSFET design offers significant advantages for overcoming scalability challenges in emerging technologies.
- Nanomaterial-based devices, like the one proposed, exhibit superior performance and suitability for downscaling compared to conventional devices.
- This design is ideal for reducing packaging density and advancing nanotechnology in electronics.
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