Microfluidic Lab-on-CMOS Packaging Using Wafer-Level Molding and 3D-Printed Interconnects

Lab-on-a-chip (LoC) technologies continue to promise lower cost and more accessible platforms for performing biomedical testing in low-cost and disposable form factors. Lab-on-CMOS or lab-on-microchip methods extend this paradigm by merging passive LoC systems with active complementary metal-oxide semiconductor (CMOS) integrated circuits (IC) to enable front-end signal conditioning and digitization immediately next to sensors in fluid channels. However, integrating ICs with microfluidics remains a challenge due to size mismatch and geometric constraints, such as non-planar wirebonds or flip-chip approaches in conflict with planar microfluidics. In this work, we present a hybrid packaging solution for IC-enabled microfluidic sensor systems. Our approach uses a combination of wafer-level molding and direct-write 3D printed interconnects, which are compatible with post-fabrication of planar dielectric and microfluidic layers. In addition, high-resolution direct-write printing can be used to rapidly fabricate electrical interconnects at a scale compatible with IC packaging without the need for fixed tooling. Two demonstration sensor-in-package systems with integrated microfluidics are shown, including measurement of electrical impedance and optical scattering to detect and size particles flowing through microfluidic channels over or adjacent to CMOS sensor and read-out ICs. The approach enables fabrication of impedance measurement electrodes less than 1 mm from the readout IC, directly on package surface. As shown, direct fluid contact with the IC surface is prevented by passivation, but long-term this approach can also enable fluid access to IC-integrated electrodes or other top-level IC features, making it broadly enabling for lab-on-CMOS applications.