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High Throughput Microfluidic Rapid and Low Cost Prototyping Packaging Methods
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Microfluidic Lab-on-CMOS Packaging Using Wafer-Level Molding and 3D-Printed Interconnects.

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    PubMed
    Summary
    This summary is machine-generated.

    This study introduces a novel hybrid packaging solution for lab-on-CMOS devices, overcoming integration challenges. The method enables low-cost, accessible biomedical testing platforms with integrated microfluidics and complementary metal-oxide semiconductor (CMOS) sensors.

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    Area of Science:

    • Microfluidics
    • Integrated Circuits
    • Biomedical Engineering

    Background:

    • Lab-on-a-chip (LoC) technologies offer accessible biomedical testing in disposable formats.
    • Lab-on-CMOS integrates passive LoC with active complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs) for on-chip signal processing.
    • Integrating ICs with microfluidics faces challenges due to size and geometric mismatches, hindering planar microfluidic fabrication.

    Purpose of the Study:

    • To present a hybrid packaging solution for IC-enabled microfluidic sensor systems.
    • To enable seamless integration of CMOS ICs with microfluidic channels for advanced sensing.
    • To demonstrate a versatile platform for lab-on-CMOS applications.

    Main Methods:

    • Utilized wafer-level molding and direct-write 3D printed interconnects for hybrid packaging.
    • Developed a method compatible with post-fabrication of planar dielectric and microfluidic layers.
    • Fabricated electrical interconnects at a scale suitable for IC packaging without fixed tooling.

    Main Results:

    • Demonstrated two sensor-in-package systems with integrated microfluidics.
    • Enabled electrical impedance and optical scattering measurements for particle detection and sizing.
    • Achieved fabrication of impedance electrodes within 1 mm of the readout IC on the package surface.

    Conclusions:

    • The hybrid packaging approach overcomes key integration challenges for lab-on-CMOS systems.
    • This method facilitates the development of low-cost, accessible platforms for biomedical testing.
    • The technology is broadly enabling for future lab-on-CMOS applications, including direct fluid access to IC features.