Large-scale sub-5-nm vertical transistors by van der Waals integration

Area of Science:

• Materials Science
• Nanotechnology
• Semiconductor Device Physics

Background:

• Vertical field-effect transistors (VFETs) offer potential for short channel devices, but scalable fabrication remains a challenge.
• Achieving ultra-short channel lengths is crucial for next-generation electronics.
• Indium gallium zinc oxide (IGZO) is a promising material for thin-film transistors.

Purpose of the Study:

• To develop a scalable fabrication method for ultra-short channel VFETs.
• To improve the performance and on-off ratio of VFETs.
• To demonstrate the transferability of large-scale oxide semiconductor arrays.

Main Methods:

• A layer-by-layer transfer process for indium gallium zinc oxide (IGZO) semiconductor arrays and metal electrodes.
• Physical release and lamination of pre-deposited oxide semiconductors between metal electrodes.
• Fabrication of 2-inch scale VFETs with controlled ultra-short channel lengths.

Main Results:

• Realization of VFETs with channel lengths down to 4 nm.
• Achieved on-current exceeding 800 A/cm².
• Demonstrated a significant increase in on-off ratio, up to 2 × 10⁵, over two orders of magnitude higher than control samples.

Conclusions:

• The developed lamination process enables simultaneous optimization of VFET performance and scalability.
• This method preserves the intrinsic properties of ultra-scaled vertical channels.
• The technique provides a viable approach for transferring large-scale oxide arrays for ultra-thin vertical devices.