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Dynamic Fault Tree Generation and Quantitative Analysis of System Reliability for Embedded Systems Based on SysML

Changyong Chu1,2, Weikang Yang3, Yajun Chen3

  • 1School of Mechanical Engineering, Hangzhou Dianzi University Information Engineering College, Hangzhou 311305, China.

Sensors (Basel, Switzerland)
|September 28, 2024
PubMed
Summary

This study introduces an automated method for analyzing embedded system reliability using dynamic fault trees derived from SysML models. The approach enhances system design by integrating temporal characteristics and redundancy for accurate quantitative reliability assessment.

Keywords:
dynamic fault treefailure modes and effects analysis (FMEA)model-based systems engineering (MBSE)profile extensionquantitative analysisrisk assessment

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Area of Science:

  • Systems Engineering
  • Reliability Engineering
  • Computer Science

Background:

  • Traditional text-based reliability analysis is insufficient for complex embedded systems.
  • Rapid and accurate quantitative analysis of system reliability is crucial.

Purpose of the Study:

  • To propose an automated method for generating and analyzing dynamic fault trees from improved system models.
  • To incorporate temporal characteristics and redundancy into system reliability analysis.

Main Methods:

  • Utilizing an "anti-semantic" approach to generate fault modes and effects analysis (FMEA) from SysML models.
  • Employing SysML Profile extension and activity diagrams for dynamic fault tree generation via traversal algorithms.
  • Representing fault tree logic gate operational rules using SysML parametric diagrams.
  • Conducting quantitative analysis within SysML internal block diagrams.

Main Results:

  • Successfully generated dynamic fault trees and performed quantitative reliability analysis.
  • The power battery management system simulation yielded a top event failure probability of 0.11981.
  • Demonstrated the feasibility of the proposed automated reliability analysis method.

Conclusions:

  • The developed method effectively addresses the limitations of traditional reliability analysis for complex embedded systems.
  • The automated generation and analysis of dynamic fault trees meet safety requirements, as validated by the power battery management system case study.