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The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
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Doping- and capacitor-less 1T-DRAM cell using reconfigurable feedback mechanism.
Yuna Suh1, Doohyeok Lim1,2
1Department of Nano Electronic Convergence Engineering, Kyonggi University, Suwon 16227, Gyeonggi-do, Republic of Korea.
Nanotechnology
|November 8, 2024
Summary
This study introduces a novel doping- and capacitor-less 1T-DRAM cell using charge plasma and bias-induced electrostatic doping (bias-ED) for advanced memory applications.
Area of Science:
- Solid State Physics
- Materials Science
- Electrical Engineering
Background:
- Traditional DRAM cells require complex doping processes and integrated capacitors.
- Scaling limitations and power consumption are key challenges in current memory technologies.
Purpose of the Study:
- To propose and demonstrate a novel doping- and capacitor-less 1T-DRAM cell.
- To achieve virtual doping using charge plasma and bias-induced electrostatic doping (bias-ED).
- To enhance memory characteristics like retention time and switching behavior.
Main Methods:
- Utilized a 5 nm-thick intrinsic silicon body with platinum and aluminum contacts for virtual doping into a p*-i-n* configuration.
- Employed two coupled polarity gates and one control gate for bias-induced electrostatic doping (bias-ED) and carrier modulation.
- Implemented a feedback mechanism for reconfigurable channel operation (p- or n-channel mode).
Main Results:
- Achieved a high on/off current ratio of approximately 10^9.
- Demonstrated steep switching behavior of about 0.2 µV dec^-1.
- Exhibited a short write time of 10 ns and excellent retention (hold > 100 s, read > 600 s).
Conclusions:
- The proposed device successfully eliminates doping and capacitor requirements, simplifying fabrication.
- The virtual doping and reconfigurable channel operation offer a promising pathway for next-generation DRAM.
- The achieved memory characteristics indicate significant potential for high-performance, low-power memory devices.