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MOS Capacitor

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
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Related Experiment Video

Updated: Jun 7, 2025

A Method for Growing Bio-memristors from Slime Mold

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Published on: November 2, 2017

Concealable physical unclonable function generation and an in-memory encryption machine using vertical

Jea Min Cho¹, Seung Soo Kim¹, Tae Won Park¹

¹Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University Gwanak-ro 1, Gwanak-gu, Seoul 08826, Republic of Korea. tagyun@snu.ac.kr.

Nanoscale Horizons

|November 13, 2024

Summary

This summary is machine-generated.

This study introduces a novel V-RRAM encryption machine that integrates Physical Unclonable Functions (PUFs) for key generation and encryption. This approach enhances hardware security and energy efficiency for edge devices.

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Area of Science:

Hardware Security
Cryptography
Non-Volatile Memory Technologies

Background:

Edge devices store vast private data, increasing hardware security needs.
Physical Unclonable Functions (PUFs) offer secure key generation by leveraging device physics.
Traditional methods face energy and security challenges due to data movement for encryption.

Purpose of the Study:

To develop an integrated solution for PUF key generation and encryption on edge devices.
To overcome the limitations of data movement in conventional hardware security approaches.
To enhance the energy efficiency and security of data protection on edge computing platforms.

Main Methods:

Implementation of a vertically integrated resistive random access memory (V-RRAM) encryption machine.
Integration of PUF key generation and encryption within the V-RRAM.
Utilizing parallel XOR logic operations for multi-thread data handling.

Main Results:

The V-RRAM encryption machine successfully integrates PUF key generation and encryption.
Achieved high area efficiency and concealable PUFs.
Demonstrated superior spatiotemporal cost-effectiveness compared to other encryption machines.

Conclusions:

The proposed V-RRAM encryption machine significantly improves hardware security for edge devices.
This integrated approach alleviates data movement issues, enhancing energy efficiency.
The solution offers a highly efficient and secure method for protecting private data on edge platforms.