Effect of channel patterning precision on the performances of vertical OECTs

Precise patterning of electronic functional layers is vital for integrated electronics, where high integration density is required. Similarly, for organic electrochemical transistors (OECTs), the patterning precision of the channel layer is essential for device miniaturization, parasitic capacitance reduction, and accurate performance evaluation. In particular, for an emerging OECT architecture, vertical OECT (vOECT), the effect of patterning precision on key device parameters (such as transconductance (g_m) and transient time (τ)) remains unclear. Here, controllable patterning of vOECT channel regions is realized by direct laser etching, where 2-100 μm margin lengths (l_M) are left beyond the vertical channel area. By quantitatively analyzing the impact of margin areas on device performance (including drain currents (I_D), g_m, and τ), it has been found that a larger l_M leads to significantly increased I_D and g_m in both n- and p-type OECTs (106.94% and 61.46% enhancement of I_D and 102.92% and 92.59% enhancement of g_m in n- and p-type OECTs, respectively, are observed as l_M increases), which saturate under an l_M of ∼60 μm. Nevertheless, linearly increasing τ (from hundreds of microseconds to a few milliseconds) is observed with increasing l_M, revealing that parasitic capacitance outside the channel would result in a longer redox reaction time but not always higher I_D and g_m. It is revealed that the patterning precision of active layers alters the OECT performances tremendously and can be designed to meet different application requirements (either high amplification capability, high integrating density, or fast response time) in OECT-based electronics.