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Energy efficient task scheduling for heterogeneous multicore processors in edge computing
Yanchun Liu1, Hongxue Qu2, Shuang Chen2
1Department of Computer and Software Engineering, Shandong College of Electronic Technology, Jinan, 250200, Shandong, China. liuyanchun@sdcet.edu.cn.
This study introduces a new algorithm for energy-efficient task scheduling on heterogeneous multicore processors (HMPs) in edge computing. The method significantly cuts energy use while ensuring tasks meet deadlines.
Area of Science:
- Computer Science
- Electrical Engineering
- Energy Systems
Background:
- Edge computing demands efficient resource management on heterogeneous multicore processors (HMPs).
- Existing task scheduling and dynamic voltage and frequency scaling (DVFS) methods lack integrated approaches for energy efficiency.
- Reactive workload adaptation and energy prediction alone do not sufficiently address energy-performance trade-offs in HMPs.
Purpose of the Study:
- To develop a novel algorithm for energy-efficient task scheduling on HMPs in edge computing environments.
- To effectively integrate task prioritization, core-aware mapping, and predictive DVFS.
- To reduce energy consumption while minimizing deadline misses.
Main Methods:
- Proposed a new algorithm combining task prioritization, core-aware mapping, and predictive dynamic voltage and frequency scaling (DVFS).
- Evaluated the algorithm's performance against state-of-the-art methods on real HMP platforms.
- Assessed energy consumption and deadline miss rates under varying workloads.
Main Results:
- Achieved a 20.9% reduction in energy consumption compared to existing methods.
- Maintained a low deadline miss rate of 2.4%.
- Demonstrated scalability and adaptability to diverse workloads on HMP platforms.
Conclusions:
- The proposed algorithm offers a significant advancement in energy-efficient task scheduling for edge computing on HMPs.
- Successfully balances performance requirements (low deadline miss rate) with substantial energy savings.
- Provides a practical and adaptable solution for real-world heterogeneous multicore processor systems.
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