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Updated: May 14, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
High-Performance Negative Capacitance Field-Effect Transistors with Synthetic Monolayer MoS2
Moonyoung Jung1, Hyo-Bae Kim2, Yungyeong Park3
1Department of Energy Science, Sungkyunkwan University, Suwon 16419, Republic of Korea.
Abstract:
Although negative capacitance field-effect transistors (NCFETs) have been extensively studied to overcome the fundamental Boltzmann limit, many prior reports on sub-60 mV/dec subthreshold swings (SS) suffer from inadequate data ranges, measurements near the noise floor, and a lack of robust device simulations, raising questions about the true efficacy of NCFETs. Moreover, recent efforts with MoS2 channels have frequently relied on mechanically exfoliated flakes, limiting device uniformity and scalability. Here, we present an NCFET that employs a synthetic monolayer MoS2 channel and a ferroelectric hafnium zirconium oxide layer in the gate stack integrated with indium metal contacts. We achieve a clearly substantiated subthermionic SS (∼55 mV/dec) across more than two decades of drain current, supported by theoretical modeling that incorporates interface trap density. Additionally, the negative drain-induced barrier lowering (DIBL)-induced threshold voltage shift, a hallmark of NCFETs, is distinctly observed. Compared to existing 2D van der Waals (vdW) NCFETs that rely on exfoliated material, our synthetic monolayer MoS2 approach demonstrates a reliable and reproducible low-voltage operation, underlining its potential for large-area integration. We further confirm that reducing source/drain contact resistance (achieved with indium metal contacts) is vital for the successful implementation of monolayer 2D vdW NCFETs.
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