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MOS Capacitor

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
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Depletion-mode MOSFETs represent a unique subset of MOSFET technology, functioning fundamentally differently from their enhancement-mode counterparts. Unlike enhancement MOSFETs, which require a positive gate-source voltage (Vgs) to turn on, depletion-mode MOSFETs are inherently conductive and "normally on" devices.
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Characteristics of MOSFET

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Metal-oxide-semiconductor field-effect Transistors, or MOSFETs, play a critical role in electronic circuits. They are primarily utilized for amplifying and switching signals.
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Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
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MOSFET

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The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
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Field-effect transistors (FETs) are integral to electronic circuits and distinguished by their three-terminal setup: the gate, drain, and source. These transistors operate as unipolar devices, which utilize either electrons or holes as charge carriers, in contrast to bipolar transistors, which use both types of carriers. The primary function of the FET is to modulate the flow of these carriers from the source to the drain through a channel. The voltage difference between the gate and source...

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Updated: May 14, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

Published on: August 28, 2018

High-Performance Negative Capacitance Field-Effect Transistors with Synthetic Monolayer MoS₂.

Moonyoung Jung¹, Hyo-Bae Kim², Yungyeong Park³

¹Department of Energy Science, Sungkyunkwan University, Suwon 16419, Republic of Korea.

|May 2, 2025

Summary

This summary is machine-generated.

This study demonstrates a novel negative capacitance field-effect transistor (NCFET) using synthetic monolayer MoS2 for reliable low-voltage operation. The device achieves a sub-60 mV/dec subthreshold swing, overcoming limitations of previous NCFET designs.

Keywords:

ferroelectric hafnium zirconium oxide indium contact negative capacitance synthetic monolayer two-dimensional van der Waals materials

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Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures

Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures

Published on: December 5, 2015

Area of Science:

Materials Science
Electrical Engineering
Nanotechnology

Background:

Negative capacitance field-effect transistors (NCFETs) aim to surpass the Boltzmann limit for steeper subthreshold swings (SS).
Previous NCFET studies often lacked sufficient data range, robust simulations, or used non-uniform exfoliated materials, questioning their practical efficacy.
Achieving reliable, scalable NCFETs with 2D materials like MoS2 remains a significant challenge.

Purpose of the Study:

To develop and validate a highly efficient NCFET using synthetic monolayer MoS2 and a ferroelectric gate stack.
To demonstrate a substantiated subthermionic SS across a wide current range, addressing prior limitations.
To confirm the critical role of low contact resistance in 2D NCFET performance.

Main Methods:

Fabrication of an NCFET employing a synthetic monolayer MoS2 channel and a HfZrO ferroelectric gate dielectric.
Integration of indium metal contacts to minimize source/drain resistance.
Device characterization including subthreshold swing (SS) and drain-induced barrier lowering (DIBL) measurements.
Theoretical device modeling incorporating interface trap density.

Main Results:

Achieved a subthermionic SS of approximately 55 mV/dec over two decades of drain current.
Distinct observation of negative DIBL-induced threshold voltage shift, a key NCFET characteristic.
Demonstrated reliable and reproducible low-voltage operation with synthetic monolayer MoS2, unlike exfoliated flake-based devices.
Confirmed the necessity of reduced contact resistance for effective 2D NCFET implementation.

Conclusions:

The synthetic monolayer MoS2 NCFET offers a scalable and reproducible pathway to sub-60 mV/dec SS, overcoming previous limitations.
Indium contacts are crucial for mitigating contact resistance, enabling high-performance 2D NCFETs.
This work validates the potential of NCFETs for future low-power electronics through advanced material synthesis and device engineering.