ChipletQuake: On-Die Digital Impedance Sensing for Chiplet and Interposer Verification.

Area of Science:

• Computer Engineering
• Hardware Security
• Semiconductor Manufacturing

Background:

• Monolithic chip complexity and cost drive adoption of chiplet-based designs.
• Chiplet architectures offer yield, flexibility, and cost benefits but introduce supply chain security risks.
• Existing security measures are insufficient for chiplet-level physical integrity verification.

Purpose of the Study:

• To introduce ChipletQuake, an on-chiplet framework for post-silicon physical security verification.
• To address security challenges like hardware Trojans and interposer tampering in chiplet systems.
• To provide a solution compatible with FPGA-based chiplets without additional hardware.

Main Methods:

• Sensing the impedance of the power delivery network (PDN) of the system.
• Developing an on-chiplet framework for real-time tamper detection.
• Utilizing digital resources of FPGA-based chiplets for compatibility.

Main Results:

• ChipletQuake successfully detects tamper events in the interposer and adjacent chiplets.
• The framework identifies the insertion of passive and subtle malicious circuits.
• Demonstrated detection of hardware Trojans and interposer tampering without direct signal interfaces.

Conclusions:

• ChipletQuake offers a novel, hardware-agnostic solution for chiplet physical security.
• The framework enhances the integrity verification of chiplet-based systems.
• Impedance sensing of the PDN is an effective method for detecting post-silicon hardware threats.