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Updated: May 8, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Probing defect formation in sulfur-annealed graphene for TMDC integration.
Ahmad Nizamuddin Muhammad Mustafa1,2, Victoria Greenacre3, Huanyu Zhou4
1Department of Materials, Imperial College London, London SW7 2AZ, UK. a.bin-muhammad-mustafa21@imperial.ac.uk.
High-temperature annealing damages graphene during 2D material integration. A novel self-assembled monolayer (SAM) protection strategy enables high-quality growth of transition metal dichalcogenides (TMDCs) on graphene for advanced electronics.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Graphene-transition metal dichalcogenide (TMDC) heterostructures are promising for electronic and optoelectronic devices.
- High-temperature TMDC growth methods degrade graphene's properties.
Purpose of the Study:
- Investigate sulfur annealing effects on graphene.
- Develop a method to protect graphene during TMDC integration.
Main Methods:
- Density Functional Theory (DFT) calculations to identify defects.
- Experimental investigation of sulfur annealing on graphene.
- Development of a self-assembled monolayer (SAM) protective strategy.
Main Results:
- Sulfur annealing causes graphene etching and electrical degradation.
- DFT identified divacancy defects with sulfur adatoms (DV-2S) as dominant, inducing p-doping.
- SAMs successfully protected graphene, enabling high-quality WS2 growth via electrodeposition.
Conclusions:
- Understanding graphene-sulfur interactions is crucial for 2D material integration.
- SAMs offer an effective protection method for graphene during TMDC growth.
- This work advances the development of high-performance graphene-based electronic and optoelectronic devices.
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