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A compact low-level RF control system for advanced concept compact electron linear accelerator.

C Liu1, L Ruckman1, R Herbst1

  • 1SLAC National Accelerator Laboratory, Menlo Park, California 94025, USA.

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|September 10, 2025
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Summary
This summary is machine-generated.

A new compact low-level RF control system uses RF system-on-chip technology for linear accelerators. This system significantly reduces size, weight, and power, meeting Advanced Concept Compact Electron Linear-accelerator requirements.

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Area of Science:

  • Physics
  • Engineering
  • Accelerator Technology

Background:

  • Linear accelerators (LINACs) require sophisticated low-level RF (LLRF) control systems.
  • Existing LLRF systems often face challenges with size, weight, and power consumption (SWaP).
  • The Advanced Concept Compact Electron Linear-accelerator (ACCEL) program has stringent SWaP and RF performance demands.

Purpose of the Study:

  • To design and develop a compact LLRF control system for the ACCEL program.
  • To leverage RF system-on-chip (RFSoC) technology for enhanced performance and reduced footprint.
  • To validate the proposed control schemes and hardware prototype.

Main Methods:

  • Employed RF system-on-chip (RFSoC) technology utilizing direct RF sampling.
  • Eliminated analog mixers, unlike conventional heterodyne-based LLRF architectures.
  • Developed a prototype LLRF platform and implemented control schemes tailored for ACCEL requirements.

Main Results:

  • Achieved magnitude and phase fluctuations below 1% and 1°, respectively, on the RF pulse flattop.
  • Demonstrated significant reduction in system size and weight compared to traditional LINAC LLRF systems.
  • Successfully tested the prototype hardware with ACCEL's designed accelerating structure cavities.

Conclusions:

  • The RFSoC-based compact LLRF system meets the challenging requirements of the ACCEL program.
  • Direct RF sampling offers a viable solution for miniaturized and high-performance LLRF control.
  • The developed prototype and control schemes are suitable for future compact linear accelerator applications.