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Simultaneously Estimating Process Variation Effect, Work Function Fluctuation, and Random Dopant Fluctuation of

Sekhar Reddy Kola1,2, Yiming Li1,2,3,4,5,6,7

  • 1Parallel and Scientific Computing Laboratory, College of Electrical and Computer Engineering, National Yang Ming Chiao Tung University, 1001 Ta-Hsueh Rd., Hsinchu 300093, Taiwan.

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|September 12, 2025
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Summary

Process variations, work function, and dopant fluctuations significantly impact sub-1-nm gate-all-around silicon nanosheet complementary field-effect transistors (GAA Si NS CFETs), especially affecting off-state leakage and static power. Understanding these variability effects is crucial for designing reliable next-generation integrated circuits.

Keywords:
3D device simulationcurrent densitiesgate capacitancesgate-all-aroundinterface trap fluctuationnanosheetprocess variation effectrandom dopant fluctuationshort-channel effectvertically stackedwork function fluctuation

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Area of Science:

  • Semiconductor device physics
  • Advanced materials science
  • Integrated circuit design

Background:

  • Sub-1-nm technology nodes require advanced transistor architectures like gate-all-around silicon nanosheet complementary field-effect transistors (GAA Si NS CFETs).
  • Process variation effects (PVEs), metal gate work function fluctuation (WKF), and random dopant fluctuation (RDF) are critical sources of variability in nanoscale devices.

Purpose of the Study:

  • To systematically investigate the combined impact of PVE, WKF, and RDF on the electrical characteristics of GAA Si NS CFETs.
  • To analyze the sensitivity of N- and P-FETs to these variability sources and their effect on off-state leakage current and power dissipation.

Main Methods:

  • Comprehensive statistical analysis of GAA Si NS CFETs at sub-1-nm technology nodes.
  • Evaluation of combined PVE, WKF, and RDF effects on key electrical parameters.
  • Assessment of relative fluctuation in static power dissipation.

Main Results:

  • The interplay of PVE, WKF, and RDF causes significant off-state leakage current fluctuations in both N-/P-FETs.
  • P-FETs exhibit higher sensitivity to variability due to parasitic conduction in the bottom nanosheet channel.
  • The statistical sum of individual fluctuations overestimates combined effects by less than 50%.
  • Static power dissipation shows the largest relative fluctuation (approx. 82.1%), challenging low-power applications.

Conclusions:

  • Variability-aware design and fabrication process optimization are essential for GAA NS CFETs.
  • Robust and reliable integrated circuits for future technology nodes depend on mitigating these fluctuation effects.
  • Understanding combined variability impacts is critical for advancing semiconductor technology.