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Compatibility between Schottky-Mott Limit and High Carrier-Injection Efficiency in Metal-van der Waals Semiconductor
Hui-Xiong Deng1,2, Chen Zhang1,2, Jin Xiao3
1State Key Laboratory of Semiconductor Chip Physics and Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China.
Fermi level pinning (FLP) persists in ideal metal-2D semiconductor junctions, preventing simultaneous high current and Schottky-Mott limit achievement. Reducing metal-semiconductor interactions increases contact resistance, highlighting challenges in 2D semiconductor interface engineering.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Traditional bulk junctions exhibit Fermi level pinning (FLP), limiting Schottky barrier height (SBH) tunability.
- This FLP phenomenon extends to 2D van der Waals (vdW) semiconductors, posing challenges for device performance.
Purpose of the Study:
- To investigate the persistence of FLP in ideal metal-vdW semiconductor junctions (MVSJs).
- To reconcile experimental observations of ideal MVSJs with the theoretical Schottky-Mott limit (SML).
Main Methods:
- Theoretical analysis of wave function hybridization at the metal-semiconductor interface.
- Modeling the impact of interfacial distance on metal-semiconductor interactions.
Main Results:
- Intrinsic FLP is shown to persist in stable ideal MVSJs due to wave function hybridization.
- Achieving the SML and high interface current simultaneously is prevented by FLP.
- Decreasing metal-semiconductor interactions to reduce FLP increases contact resistance and degrades charge injection.
Conclusions:
- Wave function hybridization is a key factor causing FLP in ideal MVSJs.
- Simultaneously achieving SML and high interface current remains a significant challenge.
- Further experimental investigation is crucial for understanding and overcoming FLP in 2D semiconductor interfaces.
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