High-κ dielectric van der Waals integration on 2D semiconductors for three-dimensional complementary logic systems

Area of Science:

• Materials Science
• Nanotechnology
• Semiconductor Physics

Background:

• Integrating high-κ dielectrics with 2D semiconductors is challenging due to unreactive surfaces and deposition scalability.
• Conventional methods struggle to maintain interface quality and achieve reliable device performance.

Purpose of the Study:

• To develop a universal van der Waals (vdW) integration strategy for high-κ dielectrics on 2D semiconductors.
• To overcome limitations in surface reactivity and deposition scalability for advanced electronic devices.

Main Methods:

• A novel dry-transfer technique using HfSe2 as a high-κ precursor on MoS2 and WSe2.
• Plasma oxidation to convert HfSe2 into amorphous HfO2, preserving atomically flat vdW interfaces.
• Fabrication of MoS2 n-type field-effect transistors (nFETs) and WSe2 p-type field-effect transistors (pFETs).

Main Results:

• Achieved high-κ dielectric stacks (κ ≈ 23) with suppressed interface trap densities (D_it ≈ 7-8 × 10^10 cm^-2 eV^-1).
• Demonstrated nFETs and pFETs with near-ideal subthreshold swing (≈ 60 mV/dec) and negligible hysteresis (≈ 3 mV).
• Successfully integrated complementary logic circuits, including inverters and ring oscillators.

Conclusions:

• The developed vdW integration strategy is scalable and effective for high-performance 2D semiconductor devices.
• This method enables vertical integration for 3D, energy-efficient logic technologies.
• The approach paves the way for advanced nanoelectronic devices and systems.