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Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
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Biasing of Metal-Semiconductor Junctions01:27

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Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
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Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
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Types of Semiconductors

Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...

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A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
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Published on: April 8, 2018

Unified Steep-Slope Switching and Non-Volatile Memory in a Complementarily Stabilized van der Waals Ferroelectric

Sangmin Lee1, Stanislav Sin2, Cheolhwa Jang1

  • 1SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, South Korea.

Small (Weinheim an Der Bergstrasse, Germany)
|May 13, 2026
PubMed
Summary

This study introduces a novel ferroelectric negative-capacitance transistor (FeNC-FET) that combines steep-slope switching with non-volatile memory. This breakthrough enables efficient logic-in-memory operations and low-power electronic devices.

Keywords:
ferroelectriclogic‐in‐memorynegative capacitancesteep switchingtwo‐dimensional material

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Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
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Last Updated: May 14, 2026

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
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Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
10:36

Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating

Published on: April 12, 2018

Area of Science:

  • Materials Science
  • Solid State Physics
  • Device Engineering

Background:

  • Conventional field-effect transistors (FETs) struggle to achieve both steep sub-threshold swing and non-volatile memory functionality simultaneously.
  • Negative-capacitance FETs (NC-FETs) offer steep switching but lack memory, while ferroelectric FETs (Fe-FETs) provide memory but not hysteresis-free switching.

Purpose of the Study:

  • To develop a single transistor capable of both steep-slope switching and robust non-volatile memory.
  • To enable new low-power electronic device concepts and logic-in-memory architectures.

Main Methods:

  • Fabrication of a van der Waals ferroelectric negative-capacitance transistor (FeNC-FET) using a CIPS/h-BN/α-In2Se3 trilayer gate stack.
  • Utilized Landau-Khalatnikov analysis and polarization-voltage measurements to understand the device physics.
  • Characterized the device for switching performance, memory characteristics, and logic operations.

Main Results:

  • Demonstrated simultaneous stabilized negative capacitance and intrinsic bistable polarization.
  • Achieved steep sub-threshold swings of 35 mV/dec (forward) and 51 mV/dec (reverse).
  • Exhibited a memory window of ~3 V, retention >10^4 s, endurance >2500 cycles, and successful logic-in-memory operations (AND, OR, majority) with 10 µs pulses.

Conclusions:

  • The developed FeNC-FET integrates steep-slope switching and non-volatile programmability into a single device.
  • This platform supports low-bias readout, short-pulse programming, and robust logic-in-memory functionality.
  • Paves the way for advanced low-power electronics and integrated memory-logic systems.