Hole Current Enhancement Using W_1-xCr_xSe₂ Alloy Interface for p-Type WSe₂ FETs.

Area of Science:

• Materials Science
• Condensed Matter Physics
• Semiconductor Device Physics

Background:

• Two-dimensional (2D) transition-metal dichalcogenides (TMDs), like tungsten diselenide (WSe$_{2}$), are promising for next-generation semiconductor devices.
• High-performance p-type field-effect transistors (FETs) using WSe$_{2}$ are hindered by Fermi level pinning (FLP), leading to ambipolar behavior and high contact resistance.
• Current solutions like van der Waals (vdW) contacts face challenges with contamination and CMOS process compatibility.

Purpose of the Study:

• To demonstrate a scalable method for creating low-resistance p-type contacts in WSe$_{2}$ FETs.
• To overcome FLP and improve device performance by engineering a novel W$_{1-x}$Cr$_{x}$Se$_{2}$ alloy interface.
• To enable the integration of WSe$_{2}$ into advanced CMOS technologies.

Main Methods:

• Fabrication of WSe$_{2}$ FETs utilizing a W$_{1-x}$Cr$_{x}$Se$_{2}$ alloy interface formed by thermal annealing of Cr contacts.
• Characterization of the WSe$_{2}$/W$_{1-x}$Cr$_{x}$Se$_{2}$/Cr interfacial layers.
• Electrical measurements to evaluate device performance, including contact resistance and on/off current ratio.

Main Results:

• The W$_{1-x}$Cr$_{x}$Se$_{2}$ alloy interface effectively suppressed FLP and undesirable ambipolar behavior.
• Achieved a significantly reduced Schottky barrier height (as low as 61.1 meV) and contact resistance decreased by approximately 3 orders of magnitude.
• WSe$_{2}$ FETs with the alloy interface exhibited robust p-type performance, with an average on/off current ratio of 2.19 × 10$^{8}$ across 20 devices.

Conclusions:

• The W$_{1-x}$Cr$_{x}$Se$_{2}$ alloy interface provides a practical and scalable strategy for engineering low-resistance p-type contacts in WSe$_{2}$.
• This advancement is crucial for realizing high-performance WSe$_{2}$ FETs and facilitates the development of TMD-based complementary logic circuits.
• The findings represent a significant step towards integrating 2D materials into future scaled CMOS technologies.