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Updated: Jan 9, 2026

Fabrication of Ti3C2 MXene Microelectrode Arrays for In Vivo Neural Recording
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A Neural Recording IC for 64-Channel Time-Multiplexed MEA with 3.3-G$\Omega$ Total Input Impedance Using Dual

Christopher Santos, Dong-Hwi Choi, Sohmyung Ha

    IEEE Transactions on Biomedical Circuits and Systems
    |December 2, 2025
    PubMed
    Summary
    This summary is machine-generated.

    This study introduces a novel 64-channel neural recording integrated circuit (IC) using time-domain multiplexing (TDM). It achieves high total input impedance (T-ZIN) by canceling parasitic effects, improving scalability for neural interfaces.

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    Area of Science:

    • Neurotechnology
    • Integrated Circuit Design
    • Biomedical Engineering

    Background:

    • Neural recording integrated circuits (ICs) require high input impedance for effective interfacing with microelectrode arrays (MEAs).
    • Conventional IC-side multiplexing can suffer from parasitic effects, limiting performance and scalability.
    • Parasitic mismatch degrades signal integrity and complicates calibration in neural recording systems.

    Purpose of the Study:

    • To present a 64-channel time-domain multiplexed (TDM) neural recording IC with enhanced total input impedance (T-ZIN).
    • To demonstrate a novel electrode-side multiplexing scheme that cancels internal and external parasitics.
    • To improve scalability and performance of neural recording ICs compared to prior art.

    Main Methods:

    • Developed a 64-channel TDM neural recording IC using electrode-side multiplexing.
    • Implemented a dual positive feedback loop (DPFL) with shared feedback capacitors for parasitic cancellation.
    • Fabricated the IC in a 180 nm CMOS process with 8:1 multiplexing per analog front end.

    Main Results:

    • Achieved a high T-ZIN of 3.3 GΩ at 10 Hz with 3 pF added external capacitance.
    • Demonstrated saline-based spike recording with low input-referred noise of 6.66 μVRMS (1 Hz to 10 kHz).
    • The system exhibits low power consumption (8.87 μW/channel) and small area (0.0619 mm2/channel).

    Conclusions:

    • The proposed electrode-side multiplexing and DPFL effectively cancel parasitics, significantly boosting T-ZIN.
    • This approach eliminates parasitic mismatch, enhancing scalability and performance for neural recording ICs.
    • The developed IC offers a promising solution for high-performance, scalable neural interfaces.