Analysis of physical mechanisms for channel-length-dependent PBTS reliability in SA TG coplanar IGZO TFTs

This study investigates the physical mechanisms for channel-length-dependent positive bias temperature stress (PBTS) reliability in self-aligned top-gate (SA TG) coplanar indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs). We fabricated devices with channel lengths of 3 µm, 12 µm, and 20 µm and characterized them using high-low frequency capacitance-voltage measurements and low-frequency noise analysis. Experimental results show that the 3 µm channel length device exhibits a significantly lower subgap density of states in the IGZO channel and a reduced near-interface trap density in the gate dielectric compared to its longer-channel counterparts. These reductions are strongly correlated with the enhanced PBTS reliability of the short-channel SA TG coplanar IGZO TFTs. We propose that hydrogen diffusion from the n⁺-IGZO source/drain extensions during fabrication may be the underlying mechanism, leading to defect passivation in both the IGZO channel and the SiO₂ gate dielectric. These findings offer physical insights into the degradation behavior of IGZO TFTs and provide practical guidance for designing highly reliable backplane transistors for advanced active-matrix organic light-emitting diode displays.