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Partially Oxidized TaS2 as a High-Quality Gate Stack for Two-Dimensional Transistors.

Kejie Guan1,2, Hao Dai1,2, Fuqin Sun1,2

  • 1School of Nano-Tech and Nano-Bionics, University of Science and Technology of China, Hefei, Anhui 230026, P. R. China.

Nano Letters
|December 11, 2025
PubMed
Summary
This summary is machine-generated.

Researchers developed a novel gate stack for 2D semiconductors using tantalum disulfide (TaS2) oxidation. This method creates clean interfaces, enabling high-performance transistors and inverters for next-generation electronics.

Keywords:
In-situ oxidationTaOxgate stackhigh-κ dielectrics

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Area of Science:

  • Materials Science
  • Nanotechnology
  • Semiconductor Physics

Background:

  • Two-dimensional (2D) semiconductors offer potential for advanced transistors.
  • Integrating gate stacks with clean interfaces for 2D semiconductors is a significant challenge.

Purpose of the Study:

  • To develop a high-quality, contamination-free gate stack for 2D semiconductors.
  • To demonstrate a nondestructive method for preparing gate stacks via van der Waals assembly.

Main Methods:

  • Partial oxidation of layered tantalum disulfide (TaS2) to form tantalum oxide (TaOx).
  • Van der Waals assembly for integrating the TaOx/TaS2 gate stack with 2D semiconductors.
  • Fabrication and characterization of top-gated 2D MoS2 field-effect transistors (FETs).

Main Results:

  • Achieved atomically abrupt and impurity-free interfaces.
  • The TaOx layer exhibited a high dielectric constant (28.6) and breakdown field (5 MV/cm).
  • Fabricated MoS2 FETs showed an on/off ratio >10^7, subthreshold swing of 61.7 mV/decade, and low gate leakage (<50 fA).
  • Demonstrated high-gain (>90) 2D complementary inverters using the TaOx/TaS2 gate stack.

Conclusions:

  • The partial oxidation of TaS2 provides a viable route for high-quality gate stack integration in 2D electronics.
  • This method ensures excellent interface properties crucial for device performance.
  • The developed gate stack enables high-performance 2D transistors and complementary circuits.