Atomic Layer-by-Layer Lithography With Step-Terrace Topography Control via Selective Catalytic Reactions

Area of Science:

• Materials Science
• Surface Science
• Nanotechnology

Background:

• Atomic step-terrace topography is crucial for semiconductor device performance, influencing epitaxial growth and carrier transport.
• Existing nanopatterning technologies struggle to achieve precise control over step-terrace topography.
• Maintaining surface integrity at the atomic scale is essential for advanced electronics.

Purpose of the Study:

• To propose and demonstrate a novel atomic layer-by-layer lithography method for precise topography control.
• To achieve integrity and control of step-terrace topography using a new technique.
• To enable extreme-precision patterning for advanced semiconductor devices.

Main Methods:

• Developed a flow-bunching evolution process for atomic layer-by-layer lithography.
• Utilized catalytic etching with high selectivity based on terrace type and dangling bond number.
• Applied pulse bias to a catalytically active probe on 4H-SiC (0001) under ambient conditions.

Main Results:

• Demonstrated atomic layer-by-layer lithography preserving periodic step-terrace topography on 4H-SiC.
• Verified perfect crystallographic order and no subsurface damage in etched regions using HAADF-STEM.
• Achieved material removal control down to single Si-C atomic bilayer precision (approximately 2.5 Å).

Conclusions:

• The proposed flow-bunching evolution enables precise control of step-terrace topography at the atomic layer level.
• This method offers a promising pathway for fabricating advanced semiconductor devices requiring extreme-precision patterning.
• The technique preserves surface integrity, crucial for epitaxial growth and device functionality.