High-Temperature Annealing of Random Telegraph Noise in a Stacked CMOS Image Sensor After Hot-Carrier Stress

This paper studies the temperature effects on device aging, particularly the random telegraph noise (RTN) degradation and the threshold voltage (Vt) shift in a stacked CMOS image sensor (CIS) caused by hot-carrier stress (HCS). Measurements indicate that both are worse when stressed at lower temperatures. Further, the RTN traps generated by HCS can be deactivated effectively by a subsequent high-temperature annealing at 240 °C for up to 360 min. In contrast, the RTN traps in chips not stressed by hot carriers are essentially unaffected by annealing at the same temperature for the same amount of time. This suggests that the physical structure of the RTN traps caused by process-induced damage (PID) without HCS might be different from that generated by HCS. The exact microscopic nature of the differences between these two kinds of RTN traps is not clear and requires further investigation. This work also suggests that RTN degradation could be a useful indicator for device aging for reliability testing and modeling.