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Related Concept Videos

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The expansion of alcohol in a thermometer is one of many commonly encountered examples of thermal expansion, which is the change in size or volume of a given system as its temperature changes. The most visible example is the expansion of hot air. When air is heated, it expands and becomes less dense than the surrounding air, which then exerts an upward force on the hot air to, for example, make steam and smoke rise, and hot air balloons float. The same behavior happens in all liquids and gases,...
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Chemical Synthesis of Porous Barium Titanate Thin Film and Thermal Stabilization of Ferroelectric Phase by Porosity-Induced Strain
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Thermal Expansion-Engineered Ferroelectric Transistor Arrays for Scalable Edge AI Computing.

Geonwook Kim1, Hyunho Seok2,3,4, Sihoon Son3,4

  • 1School of Mechanical Engineering, Sungkyunkwan University, Suwon 16419, Republic of Korea.

ACS Nano
|January 27, 2026
PubMed
Summary
This summary is machine-generated.

This study introduces reconfigurable ferroelectric field-effect transistors (FeFETs) that overcome traditional computing bottlenecks. These devices enable efficient in-memory computing for AI applications, enhancing speed and reducing energy consumption.

Keywords:
ferroelectric transistorhafnium-zirconium oxidein-memory-computingneuromorphic computingnonvolatile memory

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Area of Science:

  • Materials Science
  • Computer Engineering
  • Artificial Intelligence

Background:

  • Von Neumann architectures face energy and latency issues in AI due to separate memory and logic.
  • Ferroelectric transistors offer potential for in-memory computing but require reconfigurability.

Purpose of the Study:

  • To develop a reconfigurable ferroelectric transistor platform for efficient AI workloads.
  • To demonstrate the feasibility of in-memory computing using these novel devices.

Main Methods:

  • Engineered metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structures with tungsten (W) or titanium nitride (TiN) gate electrodes.
  • Utilized a hafnium zirconate (HZO) ferroelectric layer and evaluated device performance metrics.
  • Simulated a VGG-8 convolutional neural network and performed experimental array operations.

Main Results:

  • Achieved high performance in W-gated MFMIS-FeFETs: large memory window (~11 V), >10^6 on/off ratio, 10^12 endurance cycles, and 22 programmable states.
  • Demonstrated 97.2% accuracy for CIFAR-10 classification in a simulated VGG-8 network under nonidealities.
  • Experimentally realized analog-domain convolution for edge detection and feature extraction in FeFET arrays.

Conclusions:

  • Reconfigurable MFMIS-FeFET arrays are a scalable, low-power platform for neuromorphic and compute-in-memory systems.
  • Monolithic integration of memory and logic is enabled, addressing von Neumann bottlenecks.
  • The technology supports intelligent edge systems and future beyond-CMOS computing paradigms.