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Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station
Published on: April 1, 2020
A 5000 Fps, 4 Megapixel, Radiation-Tolerant, Wafer-Scale CMOS Image Sensor for the Direct Detection of Electrons and
Andrew Scott1, Claus Bauzà1, Adrià Bofill-Petit1
1IMASENIC S.L., C. Torrassa 77, Sant Adrià de Besòs, 08930 Barcelona, Spain.
None:
We present the design and characterisation of a 4.2-megapixel, wafer-scale CMOS image sensor, achieving over 5000 frames per second at full resolution. The sensor has a pixel pitch of 58 µm square pixels, thus being as large as a full 200 mm wafer. The sensor is read out on two sides and features column-parallel programmable gain amplifiers (PGAs) as well as analogue-to-digital converters (ADCs). The array has 2052 columns and 2064 rows; 12 rows are read in parallel, so that the total number of ADCs is 24,624. The data is transmitted through 216 sub-LVDS lanes running at 1 Gbps in double data rate (DDR). Besides the row and column control, the sensor generates the necessary voltages and currents on a chip. The programming is performed through a serial-to-parallel interface (SPI). The sensor was optimised for direct detection of electrons, but it can also detect photons. Thus, it could be a good candidate for applications where high speed is needed, such as wavefront sensing.
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