Enabling Radiation Hardness in Solid-State NAND Storage Utilizing a Laminated Ferroelectric Stack

Area of Science:

• Materials Science
• Electrical Engineering
• Semiconductor Physics

Background:

• NAND flash memory is crucial for AI but susceptible to radiation-induced threshold-voltage (Vth) degradation.
• This degradation poses reliability challenges for space and defense applications.

Purpose of the Study:

• To investigate the radiation resilience of ferroelectric field-effect transistors (FeFETs) in vertical NAND technology.
• To evaluate FeFETs with laminated gate stacks as a radiation-hardened storage solution.

Main Methods:

• Fabrication of vertical NAND-compatible laminated poly-silicon-channel FeFETs with a Hf0.5Zr0.5O2/Al2O3/Hf0.5Zr0.5O2 stack.
• Testing of FeFETs under total ionizing dose (TID) up to 10 Mrad(air).
• Analysis of threshold-voltage (Vth) shifts and memory window retention.
• Technology computer-aided design (TCAD) modeling to understand trap behavior.

Main Results:

• Laminated FeFETs maintained a full memory window and robust switching up to 10 Mrad(air).
• Negligible TID-induced drift was observed in programmed and erased states after 1 Mrad(air).
• The erased state showed approximately 2 V degradation at 10 Mrad(air), attributed to state-dependent traps.
• FeFETs demonstrated approximately 30-fold lower Vth degradation per unit dose compared to charge-trap NAND.

Conclusions:

• Laminated FeFETs offer superior radiation resilience compared to traditional charge-trap NAND.
• FeFETs with laminated gate stacks are promising candidates for radiation-hardened solid-state storage in space and defense applications.