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An energy-efficient Flash-SAR ADC with two-step flash structure in a 0.18 μm CMOS process

Siyu Xue1

  • 1School of Integrated Circuit Science and Engineering, University of Electronic Science and Technology of China, Chengdu, 611731, China. 2023090912002@std.uestc.edu.cn.

Scientific Reports
|March 17, 2026
PubMed
Summary

No abstract available in PubMed .

Keywords:
Analog-to-digital converterCapacitor sharingFlash-SAR architectureFloating inverter amplifierLow power

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