Design and Implementation of a Low-Noise Analog Front-End Circuit for MEMS Capacitive Accelerometers

Area of Science:

• Electrical Engineering
• Materials Science
• Mechanical Engineering

Background:

• Capacitive micro-electromechanical system (MEMS) accelerometers are crucial for optical image stabilization (OIS).
• Low-frequency noise and parasitic coupling are significant challenges in MEMS accelerometer performance.
• Existing analog front-end circuits often struggle with noise reduction, limiting OIS effectiveness.

Purpose of the Study:

• To present a novel low-noise analog front-end (AFE) integrated circuit (IC) for capacitive MEMS accelerometers.
• To improve the performance of optical image stabilization (OIS) systems by reducing noise in accelerometers.
• To demonstrate the effectiveness of a fully differential chopper stabilization technique in minimizing noise.

Main Methods:

• Designed a fully differential chopper stabilization technique to minimize 1/f noise and parasitic coupling.
• Fabricated the AFE circuit chip using 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology.
• Co-packaged the AFE IC with an x-axis capacitive MEMS accelerometer using a silicon-on-glass (SOG) process.

Main Results:

• Achieved a sensitivity of 342 mV/g and nonlinearity of 1.1% within the -1 g to +1 g range.
• Demonstrated a dynamic range of 88 dB.
• Attained an equivalent noise floor of 14 μg/√Hz, indicating low-noise performance.

Conclusions:

• The developed low-noise AFE IC effectively enhances capacitive MEMS accelerometers for OIS applications.
• The chopper stabilization technique significantly reduces low-frequency noise and parasitic effects.
• The integrated system offers high sensitivity and a wide dynamic range, suitable for advanced optical imaging.