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A generic compact model for resistive memories and switches.
Sangwoo Jung1, Hyoseob Kim1, Jiseon Park1
1Department of Intelligent Semiconductor Engineering, Chung-Ang University, Seoul, 06974, Republic of Korea.
Scientific Reports
|April 4, 2026
Summary
We developed a versatile compact modeling method for resistive switching devices. This approach uses common circuit elements for scalable simulations in neuromorphic computing, reducing computational costs.
Area of Science:
- Materials Science
- Electrical Engineering
- Computer Science
Background:
- Physics-driven models for resistive switching are complex and computationally expensive.
- Device-specific models limit scalability in large-scale simulations.
Purpose of the Study:
- To propose a generic compact modeling methodology for diverse resistive memory technologies.
- To enable scalable and accurate simulations for neuromorphic computing.
Main Methods:
- Developed a generalized framework using common circuit elements (nonlinear resistors, capacitors, switches) in LTspice.
- Integrated key switching phenomena: filament formation, polarization-modulated tunneling, spin-dependent resistance.
- Validated models with experimental data and performed Monte Carlo simulations for variability analysis.
Main Results:
- Successfully modeled Resistive Random-Access Memory (RRAM), Thermally-Switching (TS), Ferroelectric Tunnel Junctions (FTJ), and Magnetic Random-Access Memory (MRAM).
- Framework accurately reproduces device switching characteristics and captures variability.
- Demonstrated seamless scalability from single-device to array-level simulations.
Conclusions:
- The proposed methodology offers a scalable and computationally efficient solution for modeling various resistive switching devices.
- Enables accurate performance evaluation and power consumption estimation for neuromorphic and in-memory computing architectures.
- Broad applicability for next-generation computing systems.
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