Energy- and Area-Efficient Ionic-Switch Activation Neuron for Monolithic 3D Neural Network Architectures

To overcome the bottleneck inherent in the von Neumann architecture and advance hardware-oriented neural network design, this study conceptually proposes a monolithic three-dimensional, vertically integrated neural network architecture that supports vertical multiply-accumulate operations and horizontal interlayer data transmission. As a core component of this proposed structure, we experimentally demonstrate an ion-based switching neuron device that exhibits rectified linear unit-type output characteristics depending on the total synaptic conductance. The proposed neuron device is designed to be highly compatible with synaptic devices operating across a wide range of conductance levels by incorporating a resistance element. Owing to its compact structure and suitability for monolithic 3D stacking, the proposed neuron enables significant projected reductions in area (≥10³-fold) and energy consumption (≥10⁵-fold) compared with conventional circuit-based neural networks. These results establish a device-level hardware basis and propose a scalable architectural direction toward high-density, energy-efficient, parallel in-memory computing systems.