Enhancing Hole Mobility in Monolayer WSe₂ p-Type Field-Effect Transistors via Process-Induced Compression

Understanding the interactions between strain, interfacial mechanics, and electrical performance is critical for designing beyond-silicon electronics based on heterointegrated 2D materials. Through combined experiment and simulation, we demonstrated and analyzed the enhancement of hole mobility in p-type monolayer WSe₂ field effect transistors (FETs) under biaxial compression. We tracked FET performance versus strain by incrementing compressive strain to WSe₂ channels via sequential AlO_x deposition and performing intermediate photoluminescence and transport measurements. The hole mobility factor ${(\mu /{\mu }_0)}_{p,FE}$ increased at a rate of 340 ± 95%/%ε, and the on-current factor (I_on/I_on,0) increased at a rate of 460 ± 340%/%ε. Simulation revealed that the enhancement under compression arises primarily from a reduction in intervalley scattering between the Γ-K valence bands, and the rate is robust against variations in carrier density, impurity density, or dielectric environment. These findings show that compressive strain is a powerful technique for enhancing performance in 2D p-FETs and that it is multiplicative with defect and doping engineering.