Design of an onboard computer for small experimental rockets with an integrated hardware-in-the-loop validation...

Area of Science:

• Aerospace Engineering
• Embedded Systems Design
• Avionics Systems

Background:

• Small sounding rockets are crucial for accessible university research and education.
• Onboard computers (OBCs) are vital for mission success, managing data acquisition, flight-state detection, and recovery.
• Existing OBC solutions may lack the specific features required for experimental rocketry.

Purpose of the Study:

• To design and implement a dedicated onboard computer (OBC) for small experimental rockets.
• To validate the OBC's performance using a hardware-in-the-loop (HIL) simulation framework.
• To provide a reproducible foundation for future avionics projects in education and research.

Main Methods:

• Designed an OBC integrating an ARM-based STM32F407 microcontroller, multi-sensor suite, non-volatile storage, and dual pyrotechnic channels.
• Developed a deterministic software architecture for real-time flight-event detection.
• Implemented a HIL simulation environment to replicate sensor behavior and inject synthetic flight-dynamics data for end-to-end testing.

Main Results:

• The OBC successfully integrated essential components for reliable rocket operation.
• HIL simulations demonstrated high-fidelity reproduction of sensor electrical, timing, and communication behavior.
• Experimental HIL results confirmed reliable detection of critical flight phases (high-energy, low-energy, apogee).

Conclusions:

• The designed OBC and validation framework provide a robust solution for experimental rocketry.
• The system enables comprehensive testing without the need for physical launches, reducing costs and risks.
• Released datasets and design files support reproducibility and further development in educational avionics.