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BV-Ron,sp Trade-Off Optimization in a Floating-P-Island-Assisted Silicon Shielded-Gate Trench MOSFET
Zequ Han1, Juan Luo1, Yunhao Deng1
1School of Microelectronics and Communication Engineering, Chongqing University, Chongqing 401331, China.
Abstract:
To address trench-bottom electric-field concentration and the limited BV-Ron,sp trade-off of the conventional shielded-gate trench MOSFET (Conventional SGT), a floating-P-island-assisted silicon SGT MOSFET is proposed. Sentaurus TCAD is used to investigate the effects of increasing the number of floating P-islands from 0 to 3 on BV, Ron,sp, FOM, and electric-field distribution. Within this range, the three-floating-P-island device (3FPI-SGT) provides a favorable BV-Ron,sp trade-off; its drift-region doping matching, dynamic characteristics, and parameter sensitivity are further analyzed. Local depletion around multiple vertically discrete P-islands generates secondary electric-field peaks that share the potential drop with the main trench-bottom peak, reducing field crowding and improving voltage utilization of the drift region. After optimization, the maximum BV and FOM reach 177.7 V and 11.48 MW·cm-2, respectively. At an identical Ron,sp of 2.62 mΩ·cm2, BV increases by 54.6%. At VDS = 80 V, Coss and Crss decrease by approximately 12.8% and 12.5%, while total switching energy increases by only approximately 2.5%. A clear BV advantage is retained under ±20% single-factor deviations in key P-island parameters. Thus, the proposed structure significantly improves the silicon SGT MOSFET BV-Ron,sp trade-off with a limited dynamic-performance penalty.
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