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B Linares-Barranco

Showing results (1-10 of 7) with videos related to

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IEEE Transactions on Neural Networks|February 5, 2008
Log-domain implementation of complex dynamics reaction-diffusion neural networksT Serrano-Gotarredona, B Linares-Barranco
IEEE Transactions on Neural Networks|January 1, 1997
An ART1 microchip and its use in multi-ART1 systemsT Serrano-Gotarrdeona, B Linares-Barranco
International Journal of Neural Systems|September 30, 2000
A programmable VLSI filter architecture for application in real-time vision processing systemsT Serrano-Gotarredona, A G Andreou, B Linares-Barranco
IEEE Transactions on Neural Networks|February 5, 2008
Compact low-power calibration mini-DACs for neural arrays with programmable weightsB Linares-Barranco, T Serrano-Gotarredona, R Serrano-Gotarredona
Frontiers in Neuroscience|February 21, 2013
STDP and STDP variations with memristors for spiking neuromorphic learning systemsT Serrano-Gotarredona, T Masquelier, T Prodromakis, et al.
IEEE Transactions on Biomedical Circuits and Systems|July 16, 2013
Multicasting mesh AER: a scalable assembly approach for reconfigurable neuromorphic structured AER systems. Application to ConvNetsC Zamarreno-Ramos, A Linares-Barranco, T Serrano-Gotarredona, et al.
IEEE Transactions on Neural Networks|January 1, 1993
A CMOS analog adaptive BAM with on-chip learning and weight refreshingB Linares-Barranco, E Sanchez-Sinencio, A Rodriguez-Vazquez, et al.
Pageof 1

Showing results (1-10 of 7) with videos related to

Sort By:
Pageof 1
IEEE Transactions on Neural Networks|February 5, 2008
Log-domain implementation of complex dynamics reaction-diffusion neural networksT Serrano-Gotarredona, B Linares-Barranco
IEEE Transactions on Neural Networks|January 1, 1997
An ART1 microchip and its use in multi-ART1 systemsT Serrano-Gotarrdeona, B Linares-Barranco
International Journal of Neural Systems|September 30, 2000
A programmable VLSI filter architecture for application in real-time vision processing systemsT Serrano-Gotarredona, A G Andreou, B Linares-Barranco
IEEE Transactions on Neural Networks|February 5, 2008
Compact low-power calibration mini-DACs for neural arrays with programmable weightsB Linares-Barranco, T Serrano-Gotarredona, R Serrano-Gotarredona
Frontiers in Neuroscience|February 21, 2013
STDP and STDP variations with memristors for spiking neuromorphic learning systemsT Serrano-Gotarredona, T Masquelier, T Prodromakis, et al.
IEEE Transactions on Biomedical Circuits and Systems|July 16, 2013
Multicasting mesh AER: a scalable assembly approach for reconfigurable neuromorphic structured AER systems. Application to ConvNetsC Zamarreno-Ramos, A Linares-Barranco, T Serrano-Gotarredona, et al.
IEEE Transactions on Neural Networks|January 1, 1993
A CMOS analog adaptive BAM with on-chip learning and weight refreshingB Linares-Barranco, E Sanchez-Sinencio, A Rodriguez-Vazquez, et al.
Pageof 1