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Journal of Nanoscience and Nanotechnology|October 6, 2012
Nanowire dimensions effect on ON/OFF current ratio and sub-threshold slope in silicon nanowire transistorsYasir Hashim, Othman SidekJournal of Nanoscience and Nanotechnology|May 8, 2013
Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverterYasir Hashim, Othman SidekJournal of Nanoscience and Nanotechnology|February 21, 2013
Effect of temperature on the characteristics of silicon nanowire transistorYasir Hashim, Othman SidekJournal of Nanoscience and Nanotechnology|December 31, 2015
Optimization of Nanowire-Resistance Load Logic InverterYasir Hashim, Othman SidekJournal of Nanoscience and Nanotechnology|April 20, 2018
A New Approach for Dimensional Optimization of Inverters in 6T-Static Random-Access Memory Cell Based on Silicon Nanowire TransistorYasir HashimJournal of Nanoscience and Nanotechnology|July 19, 2016
Nanowire NMOS Logic Inverter CharacterizationYasir HashimJournal of Nanoscience and Nanotechnology|February 17, 2018
Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire TransistorYasir HashimSensors (Basel, Switzerland)|November 3, 2018
Nano-Antenna Coupled Infrared Detector DesignMohamed H Mubarak, Othman Sidek, Mohamed R Abdel-Rahman, et al.Pageof 1