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Fabrication of Periodic Gold Nanocup Arrays Using Colloidal Lithography
Published on: September 2, 2017
Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles
Girish Muralidharan1, Navakanta Bhat, Venugopal Santhanam
1Department of Chemical Engineering, Indian Institute of Science, Bangalore, 560012, India.
Nanoscale
|October 12, 2011
Abstract:
We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.

