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Improved electrical performance of an oxide thin-film transistor having multistacked active layers using a solution
Deuk Jong Kim1, Dong Lim Kim, You Seung Rim
1School of Electrical and Electronic Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 120-749, Korea.
ACS Applied Materials & Interfaces
|July 17, 2012
Summary
Multistacked active layers (MSALs) enhance thin-film transistor (TFT) performance by increasing film density. This study shows MSAL TFTs achieve higher mobility and improved bias stress stability compared to single-layer devices.
Area of Science:
- Materials Science
- Electrical Engineering
- Semiconductor Physics
Background:
- Thin-film transistors (TFTs) are crucial for electronic displays and circuits.
- Improving TFT electrical performance, such as mobility and stability, is an ongoing research area.
- Existing TFTs often face limitations in performance due to film properties.
Purpose of the Study:
- To investigate the impact of multistacked active layers (MSALs) on TFT performance.
- To understand the mechanism behind performance enhancement in MSAL TFTs.
- To compare the electrical characteristics of MSAL TFTs with conventional single active layer TFTs.
Main Methods:
- Fabrication of TFTs with both single active layers and MSALs.
- Characterization of film density and porosity in the active layers.
- Electrical performance testing, including field-effect mobility and positive bias stress measurements.
Main Results:
- MSALs lead to higher film density in the effective channel by reducing sublayer porosity.
- The proposed TFT with MSALs demonstrated a significantly enhanced field-effect mobility of 2.17 cm²/ (V·s).
- MSAL TFTs showed a reduced threshold voltage shift (8.2 V) under positive bias stress compared to single-layer TFTs (18.1 V).
Conclusions:
- Multistacked active layers are an effective strategy for improving TFT electrical performance.
- Increased film density resulting from reduced porosity is the key factor for performance enhancement.
- MSAL TFTs offer a promising pathway for developing more robust and efficient electronic devices.
