Electromigration failure in a copper dual-damascene structure with a through silicon via

Area of Science:

• Materials Science and Engineering
• Semiconductor Device Physics
• Reliability Engineering

Background:

• Electromigration is a primary failure mechanism in integrated circuits, particularly in copper interconnects.
• Through silicon vias (TSVs) are critical for 3D integration but can introduce unique electromigration challenges.
• Understanding failure development in TSV-integrated structures is crucial for advanced semiconductor reliability.

Purpose of the Study:

• To investigate electromigration-induced failure development in copper dual-damascene structures featuring a TSV.
• To model resistance changes due to void growth under the TSV and estimate interconnect lifetime.
• To analyze the impact of void size and fabrication imperfections on electromigration failure characteristics.

Main Methods:

• Analytical modeling of resistance change and interconnect lifetime estimation.
• Numerical simulations of fully three-dimensional structures to study void growth dynamics.
• Investigation of void behavior under the TSV, considering potential fabrication imperfections.

Main Results:

• Significant resistance increase observed from both large voids and small voids under the TSV.
• Fabrication imperfections at the TSV bottom exacerbate resistance increase caused by small voids.
• Electromigration failure in these structures exhibits bimodal characteristics.

Conclusions:

• Electromigration failure in copper dual-damascene structures with TSVs is likely to be bimodal.
• Both large and small void modes are critical for accurate interconnect lifetime distribution prediction.
• Consideration of fabrication imperfections is essential for precise reliability assessments.