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Ultra-low-power and robust digital-signal-processing hardware for implantable neural interface microsystems.

S Narasimhan, H J Chiel, S Bhunia

    IEEE Transactions on Biomedical Circuits and Systems
    |July 16, 2013
    PubMed
    Summary
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    This study introduces a novel hardware design framework for neural signal processing in implantable microsystems. The approach optimizes energy efficiency and robustness, crucial for brain-computer interfaces and neural monitoring devices.

    Area of Science:

    • Neuroscience
    • Electrical Engineering
    • Computer Engineering

    Background:

    • Implantable microsystems for neural applications require efficient, low-power, real-time processing of multichannel neural data.
    • Existing designs face challenges with power consumption, miniaturization, and robustness under process variations.

    Purpose of the Study:

    • To propose an integrated-circuit/architecture-level hardware design framework for neural signal processing.
    • To enhance energy efficiency and operational robustness in ultra-low-power, miniaturized neural monitoring systems.

    Main Methods:

    • Comparison of ultra-low frequency subthreshold and conventional superthreshold design techniques for power reduction.
    • Implementation of an architecture-level preferential design approach, isolating critical computation blocks.

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  • Simulation of the proposed design using prerecorded neural data from Aplysia californica.

    • Main Results:

    • Superthreshold design with power gating achieves comparable energy dissipation to subthreshold design, with higher robustness and yield.
    • The preferential design approach significantly improves total energy efficiency without compromising output signal quality.
    • Graceful degradation in signal quality is achieved under voltage scaling by confining failures to noncritical components.

    Conclusions:

    • The proposed hardware design framework offers significant improvements in energy efficiency and robustness for neural signal processing.
    • This approach is vital for developing next-generation implantable microsystems for brain activity monitoring and manipulation.
    • The design demonstrates effective performance even under significant process variations and voltage scaling.