Temperature dependence of stacking faults in catalyst-free GaAs nanopillars

Impressive opto-electronic devices and transistors have recently been fabricated from GaAs nanopillars grown by catalyst-free selective-area epitaxy, but this growth technique has always resulted in high densities of stacking faults. A stacking fault occurs when atoms on the growing (111) surface occupy the sites of a hexagonal-close-pack (hcp) lattice instead of the normal face-centered-cubic (fcc) lattice sites. When stacking faults occur consecutively, the crystal structure is locally wurtzite instead of zinc-blende, and the resulting band offsets are known to negatively impact device performance. Here we present experimental and theoretical evidence that indicate stacking fault formation is related to the size of the critical nucleus, which is temperature dependent. The difference in energy between the hcp and fcc orientation of small nuclei is computed using density-function theory. The minimum energy difference of 0.22 eV is calculated for a nucleus with 21 atoms, so the population of nuclei in the hcp orientation is expected to decrease as the nucleus grows larger. The experiment shows that stacking fault occurrence is dramatically reduced from 22% to 3% by raising the growth temperature from 730 to 790 ° C. These data are interpreted using classical nucleation theory which dictates a larger critical nucleus at higher growth temperature.