A 155 μ W 88-dB DR discrete-time ∆Σ modulator for digital hearing aids exploiting a summing SAR ADC quantizer

This paper presents a low-power switched-capacitor ∆Σ modulator for digital hearing-aid applications that features a novel summing successive approximation (SAR). The summing SAR performs multi-bit quantization together with the analog addition required in feed-forward (FF) ∆Σ modulator (∆ΣM) topologies, with no attenuation of the input signals and no need for amplifiers. The prototype is implemented in a 0.18- μ m CMOS technology and its measurements demonstrate a dynamic range of 88 dB in 10 kHz bandwidth while consuming 155 μW from a 1.8 V supply. The combined use of passive addition and SAR quantization reduces the complexity and power consumption of the modulator. The summing SAR ADC quantizer results in a calculated power saving of 40% when compared to a multi-bit FF ∆ΣM using active addition and flash quantization.