Design of an MR image processing module on an FPGA chip.

Area of Science:

• * Digital Signal Processing
• * Medical Imaging Technology
• * Hardware Acceleration

Background:

• * Real-time image processing is crucial for Magnetic Resonance Imaging (MRI).
• * Field-Programmable Gate Arrays (FPGAs) offer a platform for hardware acceleration of computationally intensive tasks like image reconstruction.
• * Existing FPGA designs for 2D Fast Fourier Transform (FFT) often require off-chip resources and complex operations, limiting portability and efficiency.

Purpose of the Study:

• * To design and implement a portable, efficient, single-chip FPGA module for real-time image processing.
• * To simplify the design workflow through graphical coding.
• * To accelerate the reconstruction of multi-slice MR images.

Main Methods:

• * Development of a 2D FFT core implemented on a single-chip FPGA.
• * Design of a novel address generation unit to eliminate the need for direct matrix transposition.
• * Integration of the processing module with graphical coding for simplified design.
• * Testing using phantom and animal data for static and simulated real-time MRI conditions.

Main Results:

• * The FPGA image processing module achieved a reconstruction speed of 400 frames/second for 128x128 images.
• * The design requires no off-chip hardware, enhancing portability.
• * The novel address generation unit significantly reduced on-chip block RAM and clock cycle usage.
• * The module demonstrated proper functionality under real-time MRI timing constraints.

Conclusions:

• * The developed FPGA module provides an efficient and portable solution for real-time MR image reconstruction.
• * Graphical coding significantly simplifies the FPGA design process.
• * The design innovations offer substantial improvements in hardware resource utilization and processing speed.