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A CMOS Neural Interface for a Multichannel Vestibular Prosthesis
A new high-voltage CMOS neural-interface chip for multichannel vestibular prostheses (MVP) significantly reduces system size and power. This chip restores vision- and posture-stabilizing reflexes with performance comparable to previous models.
Area of Science:
- Biomedical Engineering
- Neuroscience
- Integrated Circuit Design
Background:
- Vestibular prostheses aim to restore balance and vision stabilization by modulating neural activity.
- Previous multichannel vestibular prosthesis (MVP) systems were large and power-intensive due to discrete components.
Purpose of the Study:
- To develop a compact and efficient neural-interface chip for an MVP.
- To evaluate the performance of the new ASIC-based MVP system (MVP2A) against the previous generation (MVP2).
Main Methods:
- Designed and fabricated a high-voltage CMOS application-specific integrated circuit neural interface (ASIC-NI) chip.
- Integrated the ASIC-NI with a microcontroller for biphasic stimulation pulse delivery.
- Conducted physiological tests in rhesus monkeys to measure eye movement responses.
Main Results:
- The ASIC-NI chip reduced MVP system size by 48% and power consumption by 17%.
- The ASIC-based MVP system (MVP2A) successfully elicited reflexive eye movements.
- MVP2A performance in evoking slow phase eye velocities was statistically similar to MVP2.
Conclusions:
- The developed high-voltage CMOS neural-interface chip enables a smaller and more power-efficient MVP.
- The ASIC-NI chip maintains the therapeutic efficacy of the vestibular prosthesis.
- This advancement facilitates the development of more integrated and wearable neuroprosthetic devices.
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