A Single-Chip Full-Duplex High Speed Transceiver for Multi-Site Stimulating and Recording Neural Implants

Area of Science:

• Biomedical Engineering
• Electrical Engineering
• Neuroscience

Background:

• High-density neural interfaces require efficient bidirectional communication for simultaneous recording and stimulation.
• Existing transceivers face challenges with implant size, power consumption, and asymmetric data rate demands.

Purpose of the Study:

• To present a novel, fully-integrated, low-power full-duplex transceiver (FDT) for high-density neural interfacing.
• To achieve asymmetric data rates, supporting higher uplink (recording) than downlink (stimulation).
• To reduce implant size and complexity by sharing a single antenna for transmission and reception.

Main Methods:

• Utilized impulse radio ultra-wideband (IR-UWB) for the transmitter (TX) and a 2.4-GHz on-off keying (OOK) receiver (RX).
• Implemented >20 dB isolation between TX and RX paths using pulse shaping and space-efficient filtering.
• Integrated the FDT into a standard TSMC 0.18-μm CMOS process.

Main Results:

• Achieved dual-band data rates of 500 Mbps for TX uplink and 100 Mbps for RX downlink.
• Demonstrated a total power consumption of 10.4 mW in full-duplex mode.
• Successfully demonstrated wireless power transfer of 25 mW with 41.6% efficiency.

Conclusions:

• The novel FDT effectively supports high-density, bidirectional neural interfacing with asymmetric data rates.
• The integrated, low-power design minimizes implant size and complexity.
• This technology advances the capabilities of implantable neural devices for research and clinical applications.