Electronic Sleep Stage Classifiers: A Survey and VLSI Design Methodology.

Area of Science:

• Neuroscience
• Biomedical Engineering
• Sleep Science

Background:

• Existing sleep stage classifiers vary in accuracy, automation, complexity, and invasiveness.
• Automatic sleep stage classification is crucial for understanding sleep disorders and neurological functions.
• Rodent models are vital for studying sleep mechanisms and their impact on cognition.

Purpose of the Study:

• To review and compare existing sleep stage classification methods.
• To develop and implement a miniature, low-latency, low-power microsystem for automatic sleep stage classification in rodents.
• To enable non-disruptive closed-loop studies on REM sleep deprivation and memory consolidation.

Main Methods:

• A comprehensive review of current sleep stage classifier sensors and algorithms.
• Development of a classification algorithm using electromyogram (EMG) and electroencephalogram (EEG) signals for REM sleep detection.
• Implementation of the algorithm on a low-power FPGA with a multi-channel neural recording IC for low-latency processing.

Main Results:

• The microsystem achieved low-latency classification (≤1 ms).
• Off-line experiments demonstrated high REM sleep detection accuracy: 81.69% sensitivity and 93.86% specificity.
• Maximum latency observed was 39 [Formula: see text].

Conclusions:

• The developed microsystem offers a low-complexity, low-power solution for automatic sleep stage classification in rodents.
• The device facilitates non-disruptive, closed-loop REM sleep manipulation for future research.
• This technology supports investigations into the role of REM sleep in memory consolidation and the effects of its deprivation.