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Sputtered Encapsulation as Wafer Level Packaging for Isolatable MEMS Devices: A Technique Demonstrated on a
Azrul Azlan Hamzah1, Jumril Yunas2, Burhanuddin Yeop Majlis3
1Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor, Malaysia. azlanhamzah@ukm.my.
Sensors (Basel, Switzerland)
|November 23, 2016
Summary
Wafer-level sputtered silicon encapsulation offers a robust, CMOS-compatible solution for packaging isolatable microelectromechanical systems (MEMS) devices. This technique successfully encapsulates devices like accelerometers, ensuring their integrity for various applications.
Area of Science:
- Materials Science
- Electrical Engineering
- Mechanical Engineering
Background:
- Isolatable microelectromechanical systems (MEMS) devices, such as accelerometers and RF components, require robust packaging.
- Wafer-level packaging (WLP) offers an economical and efficient solution for mass production.
Purpose of the Study:
- To develop and demonstrate a sputtered silicon encapsulation technique for isolatable MEMS devices at the wafer level.
- To evaluate the robustness and compatibility of the developed encapsulation method.
Main Methods:
- Utilized a MEMSTech 50g capacitive accelerometer as a test vehicle.
- Employed a multi-layer encapsulation stack: spin-on glass (SOG) sacrificial layer, SU-8 base layer, RF sputtered silicon structural layer, gold-silicon eutectic seal layer, and liquid crystal polymer (LCP) outer layer.
- Performed Scanning Electron Microscopy (SEM) inspection, capacitance testing, and nanoindentation tests.
Main Results:
- Achieved highly uniform surface profiles for sputtered silicon encapsulation.
- Confirmed successful release of movable MEMS elements post-encapsulation via SEM and capacitance tests.
- Demonstrated device robustness sufficient for transfer molding processes through nanoindentation.
Conclusions:
- Developed a robust, CMOS-compatible, and economical wafer-level encapsulation technique for isolatable MEMS.
- The sputtered silicon encapsulation is suitable for packaging MEMS devices that do not interact with their environment.
- This method enables efficient packaging of MEMS devices at the wafer level.
