A memory efficient implementation scheme of Gauss error function in a Laguerre-Volterra network for neuroprosthetic...

Area of Science:

• Biomedical Engineering
• Neuroscience
• Computer Engineering

Background:

• Cognitive neural prosthetics aim to restore lost cognitive functions.
• Generalized Laguerre-Volterra (GLV) networks provide a mathematical foundation for these devices.
• Existing implementations often require significant computational resources.

Purpose of the Study:

• To report a hardware implementation scheme for the Gauss error function within GLV networks.
• To target reconfigurable platforms for efficient prosthetic development.
• To circumvent memory-intensive look-up table (LUT) approaches.

Main Methods:

• Numerical approximations were formulated to convert non-elementary function computations into elementary function operations.
• An adjustable error compensation scheme was developed based on error trajectory analysis.
• The scheme leverages run-time characteristics of reconfigurable systems for customizable precision.

Main Results:

• Significant reductions in hardware resource utilization compared to polynomial expansion: 94.2% fewer LUTs, 94.1% fewer occupied slices, and 90.0% fewer DSP48E1s.
• Substantial memory savings compared to LUT-based schemes, sparing 1.0x10^17 bits with a 1.0x10^-3 maximum allowable error.
• Demonstrated efficient hardware implementation on a Xilinx XC6VLX240T FPGA.

Conclusions:

• The proposed implementation scheme offers a resource-efficient approach for GLV networks in neural prosthetics.
• This method facilitates the study of large-scale neural ensemble activity.
• It supports the design and development of advanced neural prosthetic devices.