Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

Biasing of FET01:22

Biasing of FET

773
Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
773
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

881
Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
881
MOS Capacitor01:25

MOS Capacitor

1.6K
A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
1.6K
Field Effect Transistor01:29

Field Effect Transistor

1.3K
Field-effect transistors (FETs) are integral to electronic circuits and distinguished by their three-terminal setup: the gate, drain, and source. These transistors operate as unipolar devices, which utilize either electrons or holes as charge carriers, in contrast to bipolar transistors, which use both types of carriers. The primary function of the FET is to modulate the flow of these carriers from the source to the drain through a channel. The voltage difference between the gate and source...
1.3K
Non-ohmic Devices00:51

Non-ohmic Devices

1.6K
In most substances, the current flow is proportional to the voltage applied to it. A simple relationship between the values of current, voltage, and resistance is known as Ohm's law. Nonohmic devices do not exhibit a linear relationship between voltage and current. One such device is the semiconducting circuit element known as a diode. A diode is a circuit device that allows current flow in only one direction.
Consider a simple circuit consisting of a battery, a diode, and a resistor. A...
1.6K
MOSFET01:16

MOSFET

1.4K
The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
1.4K

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Mechanistic evaluation of amorphous InGaZnO-based one transistor-one capacitor memory cell <i>via</i> fast current-voltage measurements and modeling.

Nanoscale·2026
Same author

Reconfigurable 2D Floating-Gate Field-Effect Transistors with Graphene-Induced Interfacial Polarization for Unified Memory-Logic Integration.

ACS nano·2026
Same author

4K Self-Rectifying Resistive Memory Crossbar Array for Reliable Pattern Recognition.

ACS nano·2026
Same author

Heterogeneous Local-Epitaxial Growth Behavior of Ultrathin HfO<sub>2</sub>/Al-Doped TiO<sub>2</sub> Bilayer Dielectrics for Dynamic Random-Access Memory Capacitor Applications.

ACS applied materials & interfaces·2026
Same author

Volatile Heteroleptic Molybdenum Complexes: Synthesis, Structure, and Thermal Properties.

Inorganic chemistry·2026
Same author

Correction: Synthesis of heteroleptic [Sr(ddemap)(tmhd)]<sub>2</sub> and its use in atomic layer deposition of low carbon SrO thin films.

RSC advances·2026

Related Experiment Video

Updated: Feb 23, 2026

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

4.4K

Four-Bits-Per-Cell Operation in an HfO2 -Based Resistive Switching Device.

Gun Hwan Kim1, Hyunsu Ju2, Min Kyu Yang3

  • 1Center for Thin-Film Materials, Korea Research Institute of Chemical Technology (KRICT), 141 Gajeong-Ro, Yuseong-Gu, Daejeon, 34114, Republic of Korea.

Small (Weinheim an Der Bergstrasse, Germany)
|September 1, 2017
PubMed
Summary

Quadruple-level cell technology in resistance switching memory achieves 16 states with high reliability using standard programming methods. This advancement offers a path toward commercialization, potentially surpassing NAND flash capabilities.

Keywords:
HfO2error checking/correction (ECC) algorithmincremental step pulse programming (ISPP)quadruple-level cell (QLC)resistive switching (RS) memory

More Related Videos

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping
14:58

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Published on: June 3, 2015

15.5K
A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
07:12

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

Published on: August 28, 2018

10.5K

Related Experiment Videos

Last Updated: Feb 23, 2026

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

4.4K
Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping
14:58

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Published on: June 3, 2015

15.5K
A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
07:12

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

Published on: August 28, 2018

10.5K

Area of Science:

  • Materials Science
  • Electrical Engineering
  • Solid-State Physics

Background:

  • Resistance switching memory (RSwM) offers potential for high-density data storage.
  • Current RSwM technologies face challenges in achieving high multilevel cell (MLC) operation and reliability.
  • NAND flash memory, the current industry standard, is limited in its MLC advancements.

Purpose of the Study:

  • To demonstrate quadruple-level cell (QLC) technology in a novel resistance switching memory device.
  • To evaluate the reliability and applicability of standard programming methods for QLC operation.
  • To assess the potential of RSwM for next-generation high-density memory solutions.

Main Methods:

  • Fabrication of an Au/Al2O3/HfO2/TiN based resistance switching memory device.
  • Utilized industry-standard incremental step pulse programming (ISPP) and error checking/correction (ECC) methods.
  • Characterized device performance, including self-compliance, gradual set-switching, and state current distribution.

Main Results:

  • Demonstrated QLC operation with 16 distinct states in the RSwM device.
  • Achieved 6σ reliability for 16 states with a state current gap of 400 nA within a 2–11 µA programmed current range.
  • Confirmed the applicability of conventional ISPP/ECC methods for QLC RSwM.

Conclusions:

  • The demonstrated QLC RSwM technology exhibits promising properties for commercialization.
  • The device's performance suggests it can be competitive with, and potentially surpass, NAND flash memory.
  • Minor material and circuit improvements could enable five-bits-per-cell technology, a significant leap beyond current NAND flash capabilities.