Hole Mobility Characteristics with Surface Roughness on Silicon-on-Insulator Substrate

Area of Science:

• Materials Science
• Semiconductor Physics
• Nanotechnology

Background:

• Hole mobility is a critical parameter for semiconductor device performance.
• Surface roughness and device dimensions, like silicon-on-insulator (SOI) thickness, can significantly influence carrier transport.
• Understanding scattering mechanisms is essential for optimizing device characteristics.

Purpose of the Study:

• To investigate the impact of surface roughness and SOI thickness on hole mobility.
• To analyze the relationship between surface roughness, effective field, temperature, and hole mobility.
• To identify dominant scattering mechanisms affecting hole transport in SOI devices.

Main Methods:

• Fabrication of silicon-on-insulator (SOI) samples with varying thicknesses (220, 100, 40 nm) and root mean square roughness (0.16, 0.85, 10.6 nm).
• Measurement of hole mobility as a function of effective field and temperature.
• Analysis of mobility data considering surface roughness scattering and phonon scattering.

Main Results:

• Hole mobility significantly decreased with increasing effective field, particularly in thinner SOI samples (40 nm) with higher surface roughness.
• Phonon scattering became the dominant mechanism at higher temperatures, irrespective of surface roughness and SOI thickness.
• Increased surface roughness exacerbated phonon scattering, leading to reduced electron and hole mobility.

Conclusions:

• Surface roughness is a critical factor degrading hole mobility in SOI devices, especially at higher effective fields.
• Phonon scattering, influenced by surface roughness, plays a significant role in mobility reduction at elevated temperatures.
• Minimizing both surface and phonon scattering, even at the atomic scale, is necessary for enhanced mobility in SOI transistors.